SK hynix - CMM - DDR5 - CXL Memory Module

New Era of Memory Expansion with CXL®

Compute Express Link® (CXL®), which utilizes the PCIe (Peripheral Component Interconnect Express) interface, is a new standardized interface that helps increase the efficiency of CPUs, GPUs, accelerators, and memory. The key advantage of CXL® memory lies in scalability: CXL® allows for flexible expansion of memory not provided by existing server systems, wherein memory capacity and performance are fixed at the time a particular server platform is adopted. CXL®’s growth potential is boundless as a promising new interface for high-performance computing systems that run AI and big data applications.

CXL®, Memory Expansion Unlocked

SK hynix’s first CXL® memory, CMM-DDR5 is a 96GB card composed of 24Gb DDR5 DRAM chips built on the latest 1anm process. Packaged as an EDSFF (Enterprise and Datacenter Standard Form Factor) E3.S, the solution supports PCIe 5.0 x8 lanes, standard DDR5 DRAM and CXL® controllers embedded within. The first samples are ready to ship from Q4 2022.

Benefits of CMM-DDR5 Product

Increasing CPU core counts requires a corresponding growth in memory bandwidth and capacity, but the capability of platforms to provide such is conversely and increasingly falling short – a widening gap that CMM-DDR5 can address.

Using SK hynix’s first bandwidth-expander CXL® memory, CMM-DDR5 as an example, the below graphic demonstrates the bandwidth and capacity gains of adding CMM-DDR5 to a system, which is comparable to attaching additional local DIMMs.

SK hynix CMM : Towards the Most Cost-effective DRAM Solutions

Following its first 96GB CMM-DDR5 SK hynix plans to continue developing CMM -optimized DRAM to provide higher-capacity memory at optimal cost. Also with CME which is greater capacity per module with cost effective DRAM solution, we seek to help customers overcome the memory capacity wall and take system performance to the next level.

SK hynix CMM-DDR5 (CXL® Memory Module) in EDSFF Form Factor

• SK hynix has developed its first DDR5 DRAM-based CXL® (Compute Express Link) memory
• samples and strengthened its presence in next-generation memory solutions market.
• The form factor of the sample is EDSFF E3.S and it supports PCle 5.0 ×8 Lane, uses
• DDR5 standard DRAM and is equipped with CXL® memory controller.
• E3.S 2T (EDSFF Form Factor)
• CXL® on 2.0 on PCIe Gen5 ×8 lane
• 96GB+ based on 1a tech DDR5
• DDR5-Class BW, Latency within 1 numa hop, Server-Class RAS, best BW/$
• Single Device Data Correction and Random Symbols Correction per Cacheline

 - PLDM type 0/2/4/5

 - Secure boot | SPDM over MCTP

 - FW update over In-band

 - Memory test based on BIST

 - JEDEC CMM Spec compliant adoption of partial CXL® 3.x features for RAS, Management